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1. Where can I get
the information about new literature?
2. I want to know the discontinued
devices.
3. What is a programmable ground pin
and why is it used?
4. Is it possible to implement LVDS
interfaces with general-purpose I/O pins?
5. Where should I contact to purchase
Altera products? |
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| 1.Where can I
get the information about new literature? |
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| You can request new literature to
lit_req@altera.com
or you can find the information at www.altera.com.
When you have any questions about literature, please
contact to 02-6200-2711 or ld@mjl.com. |
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| 2. I want to
know the discontinued devices. |
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| To increase operational efficiency
in manufacturing flow, Altera will be discontinuing
several products (see Table 1 for details). To ensure
that customers may make lifetime buys, Altera will
maintain shipments on many of these devices through
the end of 2003; Table 1 shows the last order and
last shipment dates for discontinued devices. For
a detailed list of discontinued ordering codes, refer
the Altera document listed in the reference column.
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Product Family |
Device |
Last Order Date |
Last Shipment Date |
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Classic |
Selected
devices
with a dry pack option |
08/31/01 |
02/28/02 |
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MAX 7000 |
Selected
devices
with a dry pack option |
08/31/01 |
02/28/02 |
|
MAX 9000 |
Selected
devices
with a carrier option |
08/31/01 |
02/28/02 |
| Selected
devices |
02/28/02 |
08/31/02 |
|
FLEX 8000 |
Selected
FLEX 8000 PGA packages |
02/28/02 |
08/31/02 |
|
FLEX 10K |
Selected
FLEX 10K PGA packages |
02/28/02 |
08/31/02 |
| Selected
FLEX 10K PGA & BGA packages |
02/28/03 |
08/31/03 |
|
FLEX 10KA |
Selected
FLEX 10KA PGA packages |
02/28/03 |
08/31/03 |
|
FLEX 10KE |
Selected
FLEX 10KE PGA packages |
02/28/03 |
08/31/03 |
|
APEX 20K |
Selected
APEX 20K PGA packages |
02/28/03 |
08/31/03 |
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| 3. What is a
programmable ground pin and why is it used? |
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On some devices, including APEX 20K,
APEX 20KE, FLEX 10K, FLEX 10KE, FLEX 8000, FLEX 6000,
MAX 7000AE, and MAX 7000B devices, Altera offers a
feature that allows I/O pins to be connected directly
to the devices' internal ground. This feature enhances
the noise immunity of the device and is particularly
useful where ground bounce is a design consideration.
For example, if an important output pin is used as
a clock for another device, that signal can be shielded
from ground-bounce effects by using the two adjacent
pins as programmable grounds.
In addition, the Quartus and MAX+PLUS II software
will always use the programmable ground feature on
I/O pins that are not used in a design. These pins
are designated as GND in the text-based Report File
(.rpt) or the Compiler report window. By doing so,
the Quartus and MAX+PLUS II software provides the
best possible noise immunity for each device application.
Using programmable grounds does not require any logic
resources in the Altera device. Also, other MAX family
devices can emulate programmable ground pins by using
the macrocell to drive out GND on any unused I/O pin.
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| 4. Is it possible
to implement LVDS interfaces with general-purpose
I/O pins? |
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| Altera's 16 input and 16 output True-LVDS
channels receive and transmit data at 840 Mbps and
are available for many applications. If your application
requires more LVDS I/O pins, or True-LVDS I/O pins
are not available on the chosen device, use an external
resistor network to interface LVDS signals to APEX
devices using general-purpose I/Os. |
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| 5. Where should
I contact to purchase Altera products? |
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| You can get information about Altera
products at www.altera.com
or www.altera.co.kr
or www.mjl.com.
Please, contact to 02-6200-2700 or ld@mjl.com
when you want to purchase Altera products. |
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Logic
Design
