 |
| |
| 3The 3.3-V product-term-based MAX
3000A programmable logic devices (PLDs) are the ideal
low-cost in-system programmability (ISP) solutions
for designers looking for exceptional performance.
The MAX 3000A devices are targeted toward high-volume,
low-cost designs. These devices feature an enhanced
ISP feature set and range in density from 32 to 256
macrocells with propagation delays as fast as 4.5
ns. |
| |
| Availability details on MAX 3000A
devices are shown in Table 1. |
| |
| |
| Table 1: MAX 3000A Device Availability |
| |
|
Device
|
|
Package
|
|
Speed Grade
|
|
|
EPM3032A
|
|
| |
44-pin plastic J-lead
chip carrier (PLCC) |
| |
44-pin thin quad flat
pack (TQFP) |
|
|
-4, -7, -10
|
|
|
|
|
|
|
|
EPM3064A
|
|
| |
44-pin PLCC |
| |
44-pin TQFP |
| |
100-pin TQFP |
|
|
-4, -7, -10
|
|
|
|
|
|
|
|
EPM3128A
|
|
| |
100-pin TQFP |
| |
144-pin plastic quad
flat pack (PQFP) |
|
|
-5, -7, -10
|
|
|
|
|
|
|
|
EPM3256A
|
|
| |
144-pin TQFP |
| |
208-pin PQFP |
|
|
-6, -7, -10
|
|
|
|
|
|
| |
| MAX 3000A devices support the Jam™
Standard Test and Programming Language (STAPL), JEDEC
standard JESD-71, for programming via in-circuit testers,
PCs, or embedded processors. Altera offers the no-cost
E+MAX software development suite for the MAX 3000A
devices. Featuring seamless development flows, the
E+MAX software allows you to enter, compile, and perform
timing analysis all in one tool. |
|
Logic
Design
