Nios is the industry¡¯s first general-purpose RISC-based embedded processor core optimized specifically for programmable logic, and the Excalibur development kit featuring the Nios processor core. It provides a comprehensive solution for system-on-a-programmable-chip (SOPC) designs. The Nios embedded processor can achieve 50 MIPs performance and was designed using a 16-bit instruction set, 16-/32-bit datapaths, and a five-stage pipeline that executes an average of one instruction per clock cycle.

The Nios soft embedded processor core simplifies the design process and improves your time-to-market. It uses as little as 2% of an APEX programmable logic device (PLD), leaving most of the device's resources available for logic functions. Altera's look-up table (LUT) devices and the Nios embedded processor integrate an entire system into a single device, giving designers the ultimate in design flexibility. The Nios embedded processor includes a reduced instruction set computing (RISC), central processing unit (CPU), and the industry-standard GNUPro software from Cygnus, a Red Hat company.