|
HardCopyII
structured ASICs build on the success of Altera's first two generations of
structured ASICs to deliver the lowest-risk, fastest time-to-market solution in
the industry. Engineers can test their designs with StratixII FPGA prototypes, then Altera HardCopy Design Center seamlessly migrates the
designs to a low-cost, functionally equivalent, pin-compatible HardCopy II
devices. The HardCopy II family delivers:
-
90-nm technology with
two-layer metal customization
-
Over 350-MHz system
performance
-
50 percent core power
reduction as compared to the Stratix II FPGA prototype (dynamic and static)
In contrast to
previous HardCopy families, which were based on a coarse-grained FPGA
architecture,
the HardCopy II architecture is built on fine-grained
structured cells called HCells. HCells support seamless migration from the FPGA while
providing the density, cost, performance, and power benefits of ASIC technology.
After
using Stratix II FPGAs for
prototyping and testing, designers are guaranteed
functionally equivalent drop-in replacements for their system design.
Industry-Standard Software Support
Designing for
HardCopy II structured ASICs requires no new or expensive design tools. Using
familiar Cadence, Mentor Graphics, Synopsys, or Synplicity design software with Altera's
QuartusII
software, structured ASIC designs can be prototyped faster than ever before.
Quartus II software lets engineers design for both Stratix II FPGAs and
HardCopy II structured ASICs, as well as estimate the final performance and
power consumption. Designs can be started today in Quartus II software version
4.2, and Table 1 highlights additional features that will be available in early
2005.
|
Table 1.
HardCopy Support in Quartus II Software |
|
Feature |
Description |
|
HardCopy
Floorplan Editor & Timing Models |
Targets
designs to HardCopy devices and estimates device performance and power
consumption. Allows designers to view the actual placement of their design
in the floorplan. |
|
Design
Assistant |
Ensures
that the design is compliant with HardCopy design rules to facilitate a
smooth migration. |
|
HardCopy
Files Wizard |
Assembles
all the required deliverables for migration to a HardCopy device. |
|
PowerPlay
Early Power Estimator |
Allows the
designer to estimate power consumption for HardCopy devices without using
simulation vectors. |
Copyright 2005 Altera Corporation. All rights reserved.
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Logic
Design
