|
Altera's HardCopy Stratix™ device family
provides a comprehensive alternative to ASICs. While
ASIC design involves expensive design tools, high
development costs, and long lead times, Altera's
mask-programmed
HardCopy devices offer a low-cost solution. Today,
Altera provides everything engineers need to design
HardCopy™ devices in the quickest possible
time. Fully supported by
Altera's Quartus® II
software, HardCopy Stratix devices are the ideal
solution to take Altera's industry-leading Stratix™
FPGAs to high-volume production. Based on the
successful Stratix FPGA architecture, HardCopy Stratix
devices offer an average of 50% higher performance and
up to 40% lower power consumption compared to the
equivalent Stratix FPGA. HardCopy Stratix devices are
perfect for a variety of designs that target
networking, wireless communication, high-end consumer
electronics, industrial, test, and medical
applications.
HardCopy Stratix devices preserve the architecture
and features of Stratix FPGAs and provide a
seamless migration path from prototype to
high-volume production. Built on the innovative
Stratix architecture, HardCopy Stratix devices are
based on the same 1.5-V, 0.13-µm, all-layer-copper
process as the Stratix EP1S25 through EP1S80 FPGAs. A
detailed description of the HardCopy Stratix devices,
resources, and packaging can be found on the
HardCopy Stratix Overview page.
Quartus II Software Supports HardCopy Stratix
Devices
The Altera®
Quartus II (version 3.0 and later) design software is
the industry's only design tool to offer a unified
design flow for FPGAs and fixed-function HardCopy
devices. Engineers can use the same inexpensive tools
to design both Stratix FPGAs for functional
verification and prototyping and HardCopy Stratix
devices for high-volume production. System designers
can now use the Quartus II design software to estimate
performance and power consumption of HardCopy Stratix
devices and design their systems accordingly for
maximum throughput.
Table 1 highlights several powerful HardCopy
migration features in the Quartus II software.
| Table 1. HardCopy Migration
Features in the Quartus II Software
|
| Feature
|
Description |
|
HardCopy
Floorplan Editor and Timing Models |
Targets designs to HardCopy devices and
estimates device performance and power
consumption. Allows designers to view the actual
placement of their design in the floorplan. |
|
Design Assistant |
Ensures that the design is compliant with
HardCopy design rules to facilitate a smooth
migration. |
|
HardCopy Timing
Optimization Wizard |
Provides the ability to improve performance
and lower power consumption by migrating to a
HardCopy device. |
|
HardCopy Files
Wizard |
Assembles all the required deliverables for
migration to a HardCopy device. |
|
Power Calculator |
Allows the designer to estimate power
consumption for HardCopy devices without using
simulation vectors. |
Related Links
|
Logic
Design
